We are looking for top candidates to join our research group as Post-doctoral researchers in the following project.
A Power-Efficient Heterogeneous Architecture and Run-Time Manager for Data Center Servers
The idea of this project is to develop heterogeneous multi-processor architecture targeted towards servers in data centers. Our target architecture will have processors of different performance-power trade-offs including some processors operating at lower voltage. In addition to that it will have some reconfigurable logic, some application specific processors and some ASIC components in it. Having heterogeneous architecture would allow processors of different granularities to be integrated in one platform and give the middleware/operating system the opportunity to match the right processor or computing element for the right pay load job. For example, for a bit level encryption/decryption payload, it is extremely inefficient to execute them on a word level homogenous processor, but it can be extremely efficient to execute them on a fine-grain bit level FPGA platform in terms of power and timing. Heterogeneous server architecture makes this perfect matching possible, thus greatly saves the server computing energy as it is much more efficient.
The idea of this project is to develop heterogeneous multi-processor architecture targeted towards servers in data centers. Our target architecture will have processors of different performance-power trade-offs including some processors operating at lower voltage. In addition to that it will have some reconfigurable logic, some application specific processors and some ASIC components in it. Having heterogeneous architecture would allow processors of different granularities to be integrated in one platform and give the middleware/operating system the opportunity to match the right processor or computing element for the right pay load job. For example, for a bit level encryption/decryption payload, it is extremely inefficient to execute them on a word level homogenous processor, but it can be extremely efficient to execute them on a fine-grain bit level FPGA platform in terms of power and timing. Heterogeneous server architecture makes this perfect matching possible, thus greatly saves the server computing energy as it is much more efficient.
For details, visit http://mybrightcareer.com/2011/12/24/post-doc-position-at-national-university-of-singapore/
Regards,
Saqib Rasheed
Saqib Rasheed
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